CHUNG , S. S.; OOI, C. Y. .; TEOH, G. S. . Low Power Integrated Circuit Design of Extreme Learning Machine using Power Gating Methodology. Journal of Advanced Research in Computing and Applications, [S. l.], v. 31, n. 1, p. 13–19, 2024. DOI: 10.37934/arca.31.1.1319. Disponível em: https://akademiabaru.com/submit/index.php/arca/article/view/5211. Acesso em: 21 dec. 2024.